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november 2010 doc id 13183 rev 4 1/17 17 sta516b 65-volt, 7.5-amp, quad power half bridge features ! low input/output pulse-width distortion ! 200 m ? r dson complementary dmos output stage ! cmos-compatible logic inputs ! thermal protection ! thermal warning output ! undervoltage protection description sta516b is a monolithic quad half-bridge stage in multipower bcd technology. the device can be used as dual bridge or reconfigured, by connecting pin config to pins vdd, as a single bridge with double-current capability or as a half bridge (binary mode) with half-current capability. the device is intended for the output stage of a stereo all-digital high-eff iciency amplifier. it is capable of delivering 200 w + 200 w into 6- ? loads with thd = 10% at v cc = 51 v or, in single btl configuration, 400 w into a 3- ? load with thd = 10% at v cc = 52 v. the input pins have a threshold proportional to the voltage on pin vl. the sta516b is aimed at audio amplifiers in hi-fi applications, such as home theatre systems, active speakers and docking stations. it comes in a 36-pin powerso package with exposed pad up (epu). powerso36 package with exposed pad up table 1. device summary order code temperature range package packaging sta516b 0 to 90 c powerso36 epu tube sta516b13tr 0 to 90 c powerso36 epu tape and reel www.st.com
introduction sta516b 2/17 doc id 13183 rev 4 1 introduction the sta516b is a high performa nce quad half-bridge amplifier wi th the capability to drive up to 220 w (a) stereo into 3- to 8-ohm speakers from a single 50 v supply. it offers the highest flexibility since it can be configured as a stereo-b tl, as a mono-btl or as four channels of single-ended outputs to fit different application requirements. it provides remarkably high levels of efficiency when driven by the ffx-patented 3-state pulse-width modulator embedded in stms digital audio processors . the device is self-protected by design. overcurrent, overtemperature, under- and overvoltage protection are provided with an automatic recovery feature to safeguard the device and speakers against fault conditions that could damage the overall system. a. the achievable output power depends on the ther mal configuration of the final application. a high performance thermal interface material betw een the package exposed pad and the heat sink should be used in order to maximize output power levels
sta516b pin description doc id 13183 rev 4 3/17 2 pin description figure 1. pin out table 2. pin function pin name type description 1 gnd_sub pwr substrate ground 2, 3 out2b o output half bridge 2b 4 vcc2b pwr positive supply 5 gnd2b pwr negative supply 6 gnd2a pwr negative supply 7 vcc2a pwr positive supply 8, 9 out2a o output half bridge 2a 10, 11 out1b o output half bridge 1b 12 vcc1b pwr positive supply 13 gnd1b pwr negative supply 14 gnd1a pwr negative supply 15 vcc1a pwr positive supply 16, 17 out1a o output half bridge 1a 18 n.c. - no internal connection 19 gnd_clean pwr logical ground 20 gnd_reg pwr ground for regulator v dd 21, 22 vdd pwr 5-v regulator referred to ground 23 vl pwr high logical state setting voltage, v l vcc_sign vcc_sign vss vss in2b in2a in1b in1a th_warn fault tristate pwrdn config vl vdd vdd gnd_reg gnd_clean sub_gnd out2b out2b vcc2b gnd2b gnd2a vcc2a out2a out2a out1b out1b vcc1b gnd1b gnd1a vcc1a out1a out1a n.c. 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 sta516b
pin description sta516b 4/17 doc id 13183 rev 4 24 config i configuration pin: 0: normal operation 1: bridges in parallel (out1a = out1b, out2a = out2b (if in1a = in1b, in2a = in2b)) 25 pwrdn i standby pin: 0: low-power mode 1: normal operation 26 tristate i hi-z pin: 0: all power amplifier outputs in high impedance state 1: normal operation 27 fault o fault pin advisor (open-drain device, needs pull-up resistor): 0: fault detected (short circuit or thermal, for example) 1: normal operation 28 th_warn o thermal warning advisor (open-drain device, needs pull-up resistor): 0: temperature of the ic >130 c 1: normal operation 29 in1a i input of half bridge 1a 30 in1b i input of half bridge 1b 31 in2a i input of half bridge 2a 32 in2b i input of half bridge 2b 33, 34 vss pwr 5-v regulator referred to +v cc 35, 36 vcc_sign pwr signal positive supply table 2. pin function (continued) pin name type description
sta516b electrical specifications doc id 13183 rev 4 5/17 3 electrical specifications warning: stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ?recommended operating condition? are not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. in the real application, power supplies with nominal values rated within the recommended operating conditions, may experience some rising beyond the maximum operating conditions for a short time when no or very low current is being drawn (amplifier in mute state, for instance). in this case the reliability of the device is guaranteed, provided that the absolute maximum rating is not exceeded. table 3. absolute maximum ratings symbol parameter value unit v cc_max dc supply voltage (pins 4, 7, 12, 15) 65 v v max maximum voltage on pins 23 to 32 5.5 v t j_max operating junction tem perature 0 to 150 c t stg storage temperature -40 to 150 c table 4. thermal data symbol parameter min typ max unit t j-case thermal resistance junction to case (thermal pad) - 1 2.5 c/w t warn thermal warning temperature - 130 - c t jsd thermal shut-down junction temperature - 150 - c t hsd thermal shut-down hysteresis - 25 - c table 5. recommended operating conditions symbol parameter min typ max unit v cc supply voltage for pins pvcca, pvccb 10 - 58 v t amb ambient operating temperature 0 - 90 c
electrical specifications sta516b 6/17 doc id 13183 rev 4 unless otherwise stated, the test conditions for ta bl e 6 below are v l = 3.3 v, v cc = 50 v and t amb = 25 c table 6. electrical characteristics symbol parameter test conditions min typ max unit r dson power p-channel/n-channel mosfet r dson i dd = 1 a - 200 240 m ? i dss power p-channel/n-channel leakage idss - --50a g n power p-channel r dson matching i dd = 1 a 95--% g p power n-channel r dson matching i dd = 1 a 95--% dt_s low current dead time (static) see figure 2 - 1020ns dt_d high current dead time (dynamic) l = 22 h, c = 470 nf r l = 8 ? , i dd = 4.5 a see figure 3 --50ns t d on turn-on delay time resistive load - - 100 ns t d off turn-off delay time resistive load - - 100 ns t r rise time resistive load see figure 2 --25ns t f fall time resistive load see figure 2 --25ns v in-high high level input voltage - - - v l / 2 + 300 mv v v in-low low level input voltage - v l / 2 - 300 mv --v i in-h high level input current v in = v l -1-a i in-l low level input current v in = 0.3v -1 -a i pwrdn-h high level pwrdn pin input current v l = 3.3 v - 35 - a v low low logical state voltage (pins pwrdn, tristate) (see ta b l e 7 ) v l = 3.3 v 0.8 - v v high high logical state voltage (pins pwrdn, tristate) (see ta b l e 7 ) v l = 3.3 v - 1.7 v i vcc- pwrdn supply current from v cc in power down v pwrdn = 0 v --2.4ma i fault output current on pins fault, th_warn with fault condition v pin = 3.3v -1-ma i vcc-hiz supply current from v cc in 3-state v tristate = 0 v - 22 - ma
sta516b electrical specifications doc id 13183 rev 4 7/17 i vcc supply current from v cc in operation, both channels switching) input pulse width = 50% duty, switching frequency =384khz, no lc filters -70-ma i ocp overcurrent protection threshold isc (short-circuit current limit) (1) -7.58.510a v uvp undervoltage protection threshold --7-v v ovp overvoltage protection threshold -6162.5v t pw_min output minimum pulse width no load 50 - 110 ns 1. see application note an1994 table 7. threshold switching voltage variation with voltage on pin vl voltage on pin vl, v l v low max v high min unit 2.7 1.05 1.65 v 3.3 1.4 1.95 v 5.0 2.2 2.8 v table 8. logic truth table pin tristate inputs as per figure 3 transistors as per figure 3 output mode inxa inxb q1 q2 q3 q4 0 x x off off off off hi z 100offoffonondump 101offononoffnegative 110onoffoffonpositive 111ononoffoffnot used table 6. electrical characteristics (continued) symbol parameter test conditions min typ max unit
electrical specifications sta516b 8/17 doc id 13183 rev 4 3.1 test circuits figure 2. test circuit figure 3. current dead-time test circuit low current dead time = max(dtr,dtf) outxy vcc (3/4)vcc (1/2)vcc (1/4)vcc t dtf dtr duty cycle = 50% inxy outxy gnd +vcc m58 m57 r 8 ? + - v67 = vdc = vcc/2 d03au1458 high current dead time for bridge application = abs(dtout(a)-dtin(a))+abs(dtout(b)-dtin(b)) +v cc rload=8 ? q2 outxb dtout(b) dtin(b) dtout(a) c71 470nf c70 470nf c69 470nf iout=4.5a iout=4.5a q4 q1 q3 m64 inxb m63 d00au1162 m58 inxa m57 dtin(a) duty cycle=a duty cycle=b duty cycle a and b: fixed to have dc output current of 4.5a in the direction shown in figure l68 22 l67 22 outxa
sta516b power supply and control sequencing doc id 13183 rev 4 9/17 4 power supply and control sequencing to guarantee correct operatio n and reliability, the recommen ded power-on/off sequence as shown in figure 4 should be followed figure 4. suggested power-on/off sequence v cc should be turned on before v l . this prevents uncontrolled current flowing through the internal protection diode connected between v l (logic supply) and v cc (high power supply). which could result in damage to the device. pwrdn must be released after v l is switched on. an input signal can then be sent to the power stage. pwrdn in v cc v l v cc > v l v t t t
applications information sta516b 10/17 doc id 13183 rev 4 5 applications information the sta516b is a dual channel h-bridge that is able to deliver 200 w per channel (into r l =6 ? with thd = 10% and v cc = 51v) of audio output power very efficiently. it operates in conjunction with a pulse-width modulator driver such as the sta321 or sta309a. the sta516b converts ternary, phase-shift or binary-controlled pwm signals into audio power at the load. it includes a logic interface, integrated bridge drivers, high efficiency mosfet outputs and thermal and short-circuit protection circuitry. in differential mode (ternary, phase-shift or binary differential), two logic level signals per channel are used to control high-speed mosfet switches to connect the speaker load to the input supply or to ground in a bridge configuration, according to the damped ternary modulation operation. in binary mode, both full bridge and half bridge modes are supported. the sta516b includes overcurrent and thermal protection as well as an undervoltage lockout with automatic recovery. a thermal warning status is also provided. figure 5. block diagram of full-bridge ffx ? or binary mode figure 6. block diagram of binary half-bridge mode 5.1 logic interface and decode the sta516b power outputs are controlled using one or two logic-level timing signals. in order to provide a proper logic interface, the vl input must operate at the same voltage as the ffx ? control logic supply. inl[1,2] inr[1,2] vl pwrdn tristate fault thwarn outpl outnl outpr outnr left h-bridge logic interface and decode protection regulators right h-bridge inl[1,2] inr[1,2] vl pwrdn tristate fault thwarn outpl outnl outpr outnr lefta ?-bridge logic interface and decode protection regulators leftb ?-bridge righta ?-bridge rightb ?-bridge
sta516b applications information doc id 13183 rev 4 11/17 5.2 protection circuitry the sta516b includes protection circuitry for overcurrent and thermal overload conditions. a thermal warning pin (thwarn, pin 28, open drain mosfet) is activated low when the ic temperature exceeds 130 c, just in advance of thermal shutdown. when a fault condition is detected an internal fault signal immediately disables the output power mosfets, placing both h-bridges in a high-impedance state. at the same time the open-drain mosfet of pin fault (pin 27) is switched on. there are two possible modes subsequent to activating a fault. " shutdown mode : with pins fault (with pull-up resistor) and tristate separate, an activated fault disables the device, signalling a low at pin fault output. the device may subsequently be reset to normal operation by toggling pin tristate from high to low to high using an external logic signal. " automatic recovery mode: this is shown in the applications circuits below where pins fault and tristate are connected together to a time-constant circuit (r59 and c58). an activated fault forces a reset on pin tristate causing normal operation to resume following a delay determined by the time constant of the circuit. if the fault condition persists, the circuit op eration repeats until the fault condition is cleared. an increase in the time constant of the circuit produces a longer recovery interval. care must be taken in the overall system design not to exceed the protection thresholds under normal operation. 5.3 power outputs the sta516b power and output pins are duplicated to provide a low-impedance path for the device bridged outputs. all duplicate power, ground and output pins must be connected for proper operation. the pwrdn or tristate pin should be used to set all power mosfets to the high-impedance state during power-up until the logic power supply, v l , has settled. 5.4 parallel output / high current operation when using the ffx ? mode output, the sta516b outputs can be connected in parallel to increase the output current ca pability to the load. in this configuration the sta516b can provide up to 400 w into a 3- ? load. this mode of operation is enabled with pin config (pin 24) connected to pin vdd. the inputs are joined so that in1a = in1b, in2a = in2b and similarly the outputs out1a = out1b, out2a = out2b as shown in figure 8 . 5.5 output filtering a passive 2nd-order filter is used on the sta516b power outputs to reconstruct the analog audio signal. system performance can be significantly affected by the output filter design and choice of passive components. filter designs for 3- and 6- ? loads are shown in the applications circuits of figure 7 , figure 8 and figure 9 .
applications information sta516b 12/17 doc id 13183 rev 4 5.6 applications circuits figure 7. typical stereo-btl configuration for 200 w per channel figure 8 below shows a single-blt configuration capable of giving 400 w into a 3- ? load at 10% thd with v cc = 52 v. this result was obtained using the sta30x+sta50x demo board. note that a pwm modulator as driver is required. figure 8. typical single-b tl configuration for 400 w l18 22 h l19 22 h c30 1 f c20 100nf c99 100nf c101 100nf c107 100nf c106 100nf c23 470nf c55 1000 f c21 100nf c58 100nf c58 100nf r57 10k r59 10k r63 20 r98 6 r100 6 c53 100nf c60 100nf c31 1 f c52 330pf r104 20 c109 330pf 15 m3 in1a in1a v l config pwrdn pwrdn fault tri-state th_war th_war +3.3v in1b v dd v dd v ss v ss v cc sign v cc sign gnd-reg gnd-clean in2a in1b in2a in2b protections & logic regulators 29 23 24 25 27 26 28 30 21 22 33 34 35 36 m2 m5 m4 17 16 out1a gnd1a out1a v cc 1a 14 12 10 11 out1b gnd1b out1b v cc 1b 13 l113 22 h l112 22 h c32 1 f +v cc c108 470nf c33 1 f 7 m17 m15 m16 m14 8 9 out2a gnd2a out2a v cc 2a 6 4 2 3 out2b gnd2b d00au1148b out2b v cc 2b 5 19 31 20 gndsub 1 in2b 32 c110 100nf c111 100nf r103 6 r102 6 8 ? 8 ? 6 ? 6 ? 12 h 12 h 100nf film 100nf x7r 100nf x7r 1 f x7r 2200 f 63v 680nf film 100nf film 100nf 10k 10k 6.2 1/2w 6.2 1/2w 100nf x7r 100nf x7r add. in1a in1a v l config pwrdn npwrdn fault tri-state th_war th_war +3.3v 100nf 100nf x7r in1b v dd v dd v ss v ss v cc sign v cc sign gnd-reg gnd-clean in1b in2a 29 23 n.c. 24 25 27 26 28 30 21 22 33 34 35 36 17 16 18 out1a gnd1b out1a v cc 1b 10 13 11 out1b gnd1a out1b 14 +36v 330pf 22 ? 1/2w 4 ? gnd2a 6 2 12 v cc 1a 15 v cc 2b 4 v cc 2a 7 3 out2b gnd2b d04au1545 out2b 5 19 31 20 gndsub 1 in2b 32 8 9 out2a out2a 1 f x7r +36v v cc v cc 3 ?
sta516b applications information doc id 13183 rev 4 13/17 figure 9. typical quad half-bridge configuration for 100 w per channel for more information, refer to the applications note an1994. l11 22 h l12 22 h c51 1 f c71 100nf c91 1 f c81 100nf c31 820 f c21 2200 f c58 100nf c58 100nf r57 10k r59 10k r41 20 r61 5k r62 5k r51 6 c53 100nf c60 100nf c61 100nf 15 m3 in1a in1a v l config pwrdn pwrdn fault tri-state th_war th_war +3.3v in1b v dd v dd v ss v ss v cc sign v cc sign gnd-reg gnd-clean in2a in1b in2a in2b protections & logic regulators 29 23 24 25 27 26 28 30 21 22 33 34 35 36 m2 m5 m4 17 16 outpl pgnd1p outpl v cc 1p 14 12 10 11 outnl pgnd1n outnl v cc 1n 13 c52 1 f +v cc c62 100nf 7 m17 m15 m16 m14 8 9 outpr pgnd2p outpr v cc 2p 6 4 2 3 outnr pgnd2n d03au1474 outnr v cc 2n 5 19 31 20 gndsub 1 in2b 32 c72 100nf c92 1 f c82 100nf r52 6 c41 330pf r42 20 c42 330pf c32 820 f l13 22 h l14 22 h c73 100nf c93 1 f c83 100nf c33 820 f r43 20 r53 6 c74 100nf c94 1 f c84 100nf r54 6 c43 330pf r44 20 c44 330pf c34 820 f r63 5k r64 5k r65 5k r66 5k r67 5k r68 5k 4 ? 4 ? 4 ? 4 ? 3 ? 3 ? 3 ? 3 ?
package mechanical data sta516b 14/17 doc id 13183 rev 4 6 package mechanical data figure 10. powerso36 exposed pad up outline drawing
sta516b package mechanical data doc id 13183 rev 4 15/17 in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. table 9. powerso36 exposed pad up dimensions symbol dimensions in mm dimensions in inch min typ max min typ max a 3.25 - 3.43 0.128 - 0.135 a2 3.10 - 3.20 0.122 - 0.126 a4 0.80 - 1.00 0.031 - 0.039 a5-0.20--0.008- a1 0.03 - -0.04 0.001 - -0.002 b 0.22 - 0.38 0.009 - 0.015 c 0.23 - 0.32 0.009 - 0.013 d 15.80 - 16.00 0.622 - 0.630 d1 9.40 - 9.80 0.370 - 0.386 d2-1.00--0.039- e 13.90 - 14.50 0.547 - 0.571 e1 10.90 - 11.10 0.429 - 0.437 e2--2.90--0.114 e3 5.80 - 6.20 0.228 - 0.244 e4 2.90 - 3.20 0.114 - 0.126 e - 0.65 - - 0.026 - e3 - 11.05 - - 0.435 - g0-0.080-0.003 h 15.50 - 15.90 0.610 - 0.626 h--1.10--0.043 l 0.80 - 1.10 0.031 - 0.043 m 2.25 - 2.60 0.089 - 0.102 n - - 10 degrees - - 10 degrees r - 0.6 - - 0.024 - s - - 8 degrees - - 8 degrees
revision history sta516b 16/17 doc id 13183 rev 4 7 revision history table 10. document revision history date revision changes 01-feb-2007 1 initial release. 19-mar-2007 2 update to reflect product maturity 11-aug-2009 3 updated section description on cover page. 16-nov-2010 4 modified presentation updated chapter 3: electrical specifications on page 5 added chapter 5: applications information on page 10
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